Bus System

1. bus interconnection

1.1. pathway to connect 2 or more device

1.1.1. data bus

1.1.1.1. carry data and instruction

1.1.1.1.1. line* bit can transfer

1.1.2. address bus

1.1.2.1. carry address from register to memory

1.1.3. control bus

1.1.3.1. carry control signal, timing signal, command signal

2. external

2.1. outside a CPU chip

3. internal

3.1. strictly with CPU chip

4. if want to send data to another , then

4.1. get permission

4.1.1. transfer data via bus

5. bus

5.1. system bus

5.1.1. highest level

5.2. backside bus

5.2.1. higher level

5.3. memory bus

5.3.1. second level

5.4. standard I/O

5.4.1. slower peripheral

5.5. local I/O

5.5.1. high speed

6. PCI

6.1. PCIE

6.1.1. high bandwidth

6.1.1.1. 553mbps

6.1.2. bus mastering

6.1.2.1. no need obtain

6.1.3. burst mode

6.1.3.1. multiple speed

7. Characteristics

7.1. bus speed

7.1.1. the speed can sent cross each wire each second

7.1.1.1. unit * mhz

7.2. bus bandwidth

7.2.1. total of data that can theoretically be transfer on bus in given unit

7.2.1.1. bandwidth = width * speed

7.3. bus width

7.3.1. bit that can travel in parallel down the bus