1. I/O Protection
1.1. User program must executes a system call to request that the operating system to perform I/O.
2. Memory Protection
2.1. Base register – holds the smallest legal physical memory address.
2.2. Limit register – contains the size of the range.
3. CPU Protection
3.1. Timer
3.1.1. Every time the clock ticks, the counter is decremented.
3.1.2. When timer reaches the value 0, an interrupt occurs.
3.2. Load-timer is a privileged instruction.
4. Interrupt Handling
4.1. The fixed location contains the starting address of the interrupt service routine.
4.2. The OS preserves the state of the CPU by storing registers and the program counter.
5. I/O Structure
5.1. Synchronous
5.1.1. After I/O starts, control returns to user program only upon I/O completion.
5.1.1.1. Wait instruction idles the CPU until the next interrupt
5.1.1.2. Wait loop
5.2. Asynchronous
5.2.1. After I/O starts, control returns to user program without waiting for I/O completion.
5.2.1.1. System call – request to the operating system to allow user to wait for I/O completion.
6. Storage Structure
6.1. Main Memory
6.1.1. only large storage media that the CPU can access directly.
6.2. Secondary storage
6.2.1. extension of main memory that provides nonvolatile storage capacity.
7. Storage Hierarchy
7.1. Storage systems organized in hierarchy
7.1.1. Speed
7.1.2. Cost
7.1.3. Volatility
7.2. Caching
7.2.1. copying information into faster storage system; main memory can be viewed as a last cache for secondary storage.
8. Dual-Mode Operation
8.1. When an interrupt or fault occurs, hardware switches to kernel mode.
8.2. Privileged instructions can be issued only in monitor mode.
8.3. Modes of Operation
8.3.1. User Mode
8.3.1.1. user program executes in user mode
8.3.1.2. certain areas of memory are protected from user access
8.3.1.3. certain instructions may not be executed
8.3.2. Kernal Mode
8.3.2.1. monitor executes in kernel mode
8.3.2.2. privileged instructions may be executed
8.3.2.3. protected areas of memory may be accessed