Digital Electronics
von Ravikumar S
1. Karnaugh Map
1.1. SoP
1.1.1. 4- variable Karnaugh map
1.1.2. 3- variable Karnaugh map.
1.1.3. 2- variable Karnaugh map.
1.2. PoS
1.2.1. 4- variable Karnaugh map.
1.2.2. 3- variable Karnaugh map.
1.2.3. 2- variable Karnaugh map.
2. Logic Simplification
2.1. Boolean Addition
2.2. Boolean Multiplication
2.3. Laws of Boolean Algebra
2.3.1. Commutative Laws
2.3.2. Associative Law
2.3.3. Distributive Law
2.4. Demorgan's Theorems
2.4.1. (A.B)' = A' + B'
2.4.2. (A+B)' = A' . B'
3. Boolean Algebra
4. Combinational Logic Circuit
4.1. Half-Adder
4.2. Full-Adder
4.3. parallel adder
4.4. Comparators
4.5. Flip Flop
4.5.1. R-S Flip Flop
4.5.2. D Flip Flop
4.5.3. J-K Flip Flop
4.5.4. T Flip Flop
5. Logic Gates
5.1. Basic Gates
5.1.1. OR
5.1.2. AND
5.1.3. NOT
5.2. Universal Gates
5.2.1. NOR
5.2.2. NAND
5.3. Special Gates
5.3.1. EX-OR
5.3.2. EX-NOR
6. Number System
6.1. Binary
6.2. Octal
6.3. Decimal
6.4. Hexa Decimal
7. Sequential Logic Circuits
7.1. Synchronous sequential logic
7.1.1. Up/down counter
7.1.2. Ring counter
7.1.2.1. Shift Register
7.1.3. Johnson counter
7.1.4. RAM
7.1.5. ROM
7.2. Asynchronous sequential logic
7.2.1. Ripple counter
7.2.2. Design Procedure
7.2.3. Analysis Procedure
7.2.4. State Minimization
7.2.5. Merger Grapgh
7.2.6. ASM Chart