Computer System Structure
by Alisone Chin
1. Computer System Architecture
2. Computer-System Operation
2.1. Computer system consists of one or more CPUs and a number of device controllers.
2.2. A Each device controller is in charge of a specific type of device
2.2.1. Has local Buffer
2.2.2. Iinforms CPU that it has finished its operation by causing an interrupt
3. Interrupt Handling
3.1. When the CPU is interrupted, it stops what it is doing and immediately transfers execution to a fixed location.
3.1.1. The fixed location contains the starting address of the interrupt service routine
3.2. Interrupt vector provide the address of the interrupt service routine
3.3. storing registers and the program counter.
4. Synchronous I/O Structure
4.1. Wait instruction idles the CPU until the next interrupt
4.2. Wait loop
4.3. no simultaneous I/O processing.
5. Asynchronous I/O Structure
5.1. After I/O starts, control returns to user program without waiting for I/O completion.
5.1.1. System call
5.1.2. Device-status table
5.1.3. determine device status and to modify table entry to include interrupt.
6. Two I/O Methods
7. Storage Structure
7.1. Main memory
7.1.1. only large storage media that the CPU can access directly.
7.1.2. volatile storage device
7.1.3. loses its contents when power is turned off.
7.2. Secondary storage
7.2.1. nonvolatile storage capacity
7.2.2. hold large quantities of data permanently
8. Storage Hierarchy
8.1. Storage systems organized in hierarchy.
8.1.1. Speed
8.1.2. Cost
8.1.3. Volatility
8.2. Caching
8.2.1. copying information into faster storage system
8.2.2. main memory
8.2.2.1. last cache for secondary storage
9. Storage Device Hierarchy
10. Caching
10.1. Migration of A From Disk to Register
11. Modes of Operation
11.1. User Mode
11.1.1. user program executes in user mode
11.1.2. certain areas of memory are protected from user access
11.1.3. certain instructions may not be executed
11.2. Kernel Mode
11.2.1. monitor executes in kernel mode
11.2.2. privileged instructions may be executed
11.2.3. protected areas of memory may be accessed
12. Dual-Mode Operation
12.1. distinguish between the execution of operating system code and userdefined code.
12.2. Provide hardware support to differentiate between at least two modes of operations.
13. Dual-Mode Operation
13.1. Mode bit is added to computer hardware to indicate the current mode: kernel (0) or user (1
13.2. When an interrupt or fault occurs, hardware switches to kernel mode.
13.2.1. the software has complete control of the processor and all instruction, registers and memory
13.3. Privileged instructions can be issued only in monitor mode
14. I/O Protection
14.1. User program must executes a system call to request that the operating system to perform I/O.
15. Use of A System Call to Perform I/O
16. Memory Protection
16.1. protection at least for the interrupt vector and the interrupt service routines.
16.2. two registers are used to determine the range of legal addresses a program may access:
16.2.1. Base register – holds the smallest legal physical memory addres
16.2.2. Limit register – contains the size of the range
17. Use of A Base and Limit Register
18. Hardware Address Protection
19. Hardware Address Protection
19.1. When executing in kernel mode, the operating system has unrestricted access to both monitor and user’s memory
19.1.1. Operating system is allowed to load users’ programs into users’ memory
19.1.1.1. access
19.1.1.2. modify parameters of system calls.
20. CPU Protection
20.1. Timer – interrupts computer after specified period to ensure operating system maintains control over CPU
20.1.1. Every time the clock ticks, the counter is decremented
20.1.2. When timer reaches the value 0, an interrupt occurs.