COMPUTER SYSTEM STRUCTURE

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COMPUTER SYSTEM STRUCTURE by Mind Map: COMPUTER SYSTEM STRUCTURE

1. INTERRUPT HANDLING

1.1. When the CPU is interrupted, it stops what it is doing and immediately transfers execution to a fixed location

2. STORAGE HIERARCHY

2.1. STORAGE SYSTEM

2.1.1. SPEED

2.1.2. COST

2.1.3. VOLATILITY

2.2. CACHING

3. I/O PROTECTION

3.1. all I/O instructions are privileged instructions

3.2. user program must executes a system call to request that the OS to perform I/O

4. HARDWARE ADDRESS PROTECTION

4.1. when executing in kernel mode, the OS has unrestricted access to both monitor and user's memory

5. I/O STRUCTURE

5.1. SYNCHRONOUS I/O STRUCTURE

5.1.1. wait instruction

5.1.2. wait loop

5.1.3. no simultaneous I/O processing

5.2. ASYNCHRONOUS I/O STRUCTURE

5.2.1. SYSTEM CALL - request to the operating system to allow user to wait for I/O completion

5.2.2. device-status table contain entry for each I/O device indicating its type ,address, and state

5.2.3. OS indexes into I/O device table to determine device status and to modify table entry to include interrupt

6. COMPUTER-SYSTEM OPERATION

6.1. A general-purpose computer system consists of one or more CPUs and a number of device controllers.

6.2. Each device controller is in charge of a specific type of device

6.3. Each device controller has a local buffer

6.4. The CPU and device controllers can execute concurrently

6.5. Device controller informs CPU that it has finished its operation by causing an interrupt

6.6. Interrupt indicates the occurrence of an event from either the hardware or software

7. STORAGE STRUCTURE

7.1. MAIN MEMORY

7.1.1. a volatile storage devices

7.1.2. CPU can access

7.2. SECONDARY STORAGE

7.2.1. provide nonvolatile storage capacity

7.2.2. capable to hold large quantities

7.2.3. CPU cannot access

8. DUAL MODE OPERATION

8.1. USER MODE

8.2. KERNEL MODE

8.3. MODE BIT -KERNEL(0) OR USER(1)

9. MEMORY PROTECTION

9.1. BASE REGISTER-hold the smallest legal physical memory address

9.2. LIMIT REGISTER-contains the size of the range

9.3. memory outside the defined range is protected

10. CPU PROTECTION

10.1. TIMER

10.2. when timer interrupts, control transfers to the OS

10.3. load-timer is a privileged instruction