Computer System Structure
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1. Memory Protection
1.1. system must provide memory protection for the interrupt and the interrupt service rountines
1.2. Two registers are used to determine range of legal addresses a program may access
1.2.1. Base register – holds the smallest legal physical memory address
1.2.2. Limit register – contains the size of the range
1.3. Outside memory are defined by range so that is protected
2. I/O Protection
2.1. All I/O instructions are privileged instructions
2.1.1. User program must executes a system call to request that the operating system to perform I/O.
2.2. Must ensure that a user program could never gain control of the computer in monitor mode
3. I/O Structure
3.1. Synchronous I/O Structure
3.1.1. control returns to user program only upon I/O completion
3.1.1.1. Wait instruction idles the CPU until the next interrupt
3.1.1.2. Wait loop
3.1.1.3. At most one I/O request is outstanding at a time
3.2. Asynchronous I/O Structure
3.2.1. control returns to user program without waiting for I/O completion
4. Dual-Mode Operation
4.1. Provide hardware support to differentiate between at least two modes of operations.
4.2. computer system must be able to distinguish between the execution of operating syste
4.3. Modes of Operation
4.4. User Mode
4.4.1. • user program executes in user mode •certain areas of memory are protected from user access • certain instructions may not be executed
4.5. Kernel Mode
4.5.1. • monitor executes in kernel mode • privileged instructions may be executed • protected areas of memory may be accessed
5. CPU Protection
5.1. interrupts computer after specified period to ensure operating system maintains control over CPU
5.1.1. Eg: -Every time the clock ticks -when timer reaches the value 0, an interrupt occurs
5.2. When timer interrupts, control transfers to the operating system
5.3. Load-timer is a privileged instruction
6. Computer System Opertation
6.1. General-purpose computer system
6.1.1. One or more CPUs and number of device controllers
6.1.2. Each device controller has a local buffer
6.1.3. controllers can execute concurrently
6.1.4. Interrupt indicates occurrence of an event from either the hardware or software.
7. Interrupt Handing
7.1. When the CPU is interrupted,and system will immediately transfers execution to a fixed location
7.1.1. fixed location contains the starting address of the interrupt service routine
7.2. Interrupt vector provide the address
7.3. CPU by storing registers and the program counter.
8. Storage Structure
8.1. Main memory
8.1.1. large storage media that the CPU can access directly.
8.1.1.1. storage device that loses its contents when power is turned off
8.2. Secondary storage
8.2.1. provides nonvolatile storage capacity
8.2.1.1. hold large quantities of data permanently
9. Storage Hierarchy
9.1. Storage system in hierachy
9.1.1. Speed Cost Volatility