Computer System Structure Chapter 2

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Computer System Structure Chapter 2 by Mind Map: Computer System Structure Chapter 2

1. Computer-System Operation

1.1.  A general-purpose computer system consists of one or more CPUs and a number of device controllers.  Each device controller is in charge of a specific type of device.  Each device controller has a local buffer.  The CPU and device controllers can execute concurrently.  Device controller informs CPU that it has finished its operation by causing an interrupt.  Interrupt indicates the occurrence of an event from either the hardware or software.

2. Interrupt handling

2.1. If the cpu get interrupted then it wil stop and jump to the vector table .Then after the vector solved the interrupt problem it will pass back to the pc and move on

3. Synchoronous Structure I/O

3.1. This program I/O jus can only run one program at one time only

4. Asynchronous I/O Structure

4.1. Asynchronous can support multiple program at one time but sychoronous only can support one.

5. Storage Structure

5.1. Ram as Main memory volatile storage,Hard Disk as secondary Memory (Hard Disk), support many type of storage.

6. Memory Protection

6.1. To protect the RAM from interrupt while the RAM are in working process

6.1.1. 1. Base Register hold the smallest memory

6.1.2. 2.Limit Register-Hold the largest memory

7. Dual-mode Operation

7.1. Computer need to identify which mode use computer use , USER mode(1bit) or KERNEL mode (0-bit)

8. Storage Hierachy

8.1. Oranize buy system cost and volatility

8.2. CACHING move from magnetic disk to main memory to cache to hardware register

9. Operating system goal

9.1. User goal- easy to learn ,use , reliable and safe

9.2. System goal-Operating system should be easy to design,implement and design as flexible

10. Protection

10.1. I/O

10.1.1. User program cannnot issue i/o insturction directly.

10.2. Memory

10.2.1. Base register

10.2.2. Limit Register

10.3. Hardware address

10.3.1. when execute kernel mode , access monitor mode n user memory

10.4. CPU

10.4.1. Timer

10.4.1.1. when timer interrupts control transter to OS

10.4.1.2. Load time is privilleged insturction